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@@ -0,0 +1,388 @@
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+use core::mem::{self, MaybeUninit};
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+use cortex_m::interrupt::{self, Mutex};
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+use mkl25z4::{SIM, USB0};
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+use usb_device::bus::{PollResult, UsbBusAllocator};
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+use usb_device::endpoint::{EndpointAddress, EndpointType};
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+use usb_device::{Result, UsbDirection, UsbError};
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+
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+use crate::UsbBuffers;
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+
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+pub const NUM_ENDPOINTS: usize = 16;
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+pub const BUF_SIZE: usize = 64;
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+
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+#[repr(C)]
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+pub(crate) struct BufferDescriptor {
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+ flags: u32,
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+ addr: u32,
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+}
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+
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+impl BufferDescriptor {
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+ // TODO
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+}
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+
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+#[repr(align(512), C)]
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+pub(crate) struct BufferDescriptorTable([BufferDescriptor; NUM_ENDPOINTS * 4]);
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+
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+impl BufferDescriptorTable {
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+ pub(crate) fn new() -> Self {
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+ Self([BufferDescriptor { flags: 0, addr: 0 }; NUM_ENDPOINTS * 4])
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+ }
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+}
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+
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+pub struct Endpoint {
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+ ep_type: Option<EndpointType>,
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+ in_buf: [[u8; BUF_SIZE]; 2],
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+ out_buf: [[u8; BUF_SIZE]; 2],
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+}
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+
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+impl Endpoint {
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+ pub fn ep_type(&self) -> Option<EndpointType> {
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+ self.ep_type
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+ }
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+
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+ pub fn set_ep_type(&mut self, ep_type: EndpointType) {
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+ self.ep_type = Some(ep_type);
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+ }
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+}
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+
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+impl Default for Endpoint {
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+ fn default() -> Endpoint {
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+ Endpoint {
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+ ep_type: None,
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+ in_buf: [[0; 64]; 2],
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+ out_buf: [[0; 64]; 2],
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+ }
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+ }
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+}
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+pub struct UsbBus {
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+ regs: Mutex<USB0>,
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+ buffers: &'static mut UsbBuffers,
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+ endpoints: [Endpoint; NUM_ENDPOINTS],
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+ /*ep_allocator: EndpointMemoryAllocator<USB>,
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+ max_endpoint: usize,*/
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+}
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+
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+impl UsbBus {
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+ /// Constructs a new USB peripheral driver.
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+ pub fn new(
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+ peripheral: USB0,
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+ sim: &mut SIM,
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+ buffers: &'static mut UsbBuffers,
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+ ) -> UsbBusAllocator<Self> {
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+ // TODO: Check whether the clocks are correct? USB requires a 48MHz reference clock.
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+ // SIM->SOPT2 |= SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK;
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+
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+ // Enable the peripheral.
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+ sim.scgc4.modify(|_, w| w.usbotg().set_bit());
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+
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+ let bus = UsbBus {
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+ regs: Mutex::new(peripheral),
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+ buffers: buffers,
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+ /*ep_allocator: EndpointMemoryAllocator::new(),
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+ max_endpoint: 0,*/
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+ endpoints: [Endpoint::default(); NUM_ENDPOINTS],
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+ };
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+
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+ UsbBusAllocator::new(bus)
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+ }
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+
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+ /*pub fn free(self) -> USB0 {
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+ // TODO: Disable the USB peripheral again?
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+ // TODO: The following requires an updated bare-metal crate.
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+ self.regs.into_inner()
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+ }*/
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+
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+ /*/// Simulates a disconnect from the USB bus, causing the host to reset and re-enumerate the
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+ /// device.
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+ ///
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+ /// Mostly used for development. By calling this at the start of your program ensures that the
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+ /// host re-enumerates your device after a new program has been flashed.
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+ ///
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+ /// `disconnect` parameter is used to provide a custom disconnect function.
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+ /// This function will be called with USB peripheral powered down
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+ /// and interrupts disabled.
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+ /// It should perform disconnect in a platform-specific way.
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+ pub fn force_reenumeration<F: FnOnce()>(&self, disconnect: F) {
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+ interrupt::free(|cs| {
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+ let regs = self.regs.borrow(cs);
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+
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+ let pdwn = regs.cntr.read().pdwn().bit_is_set();
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+ regs.cntr.modify(|_, w| w.pdwn().set_bit());
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+
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+ disconnect();
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+
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+ regs.cntr.modify(|_, w| w.pdwn().bit(pdwn));
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+ });
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+ }*/
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+}
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+
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+impl usb_device::bus::UsbBus for UsbBus {
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+ fn alloc_ep(
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+ &mut self,
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+ ep_dir: UsbDirection,
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+ ep_addr: Option<EndpointAddress>,
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+ ep_type: EndpointType,
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+ max_packet_size: u16,
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+ _interval: u8,
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+ ) -> Result<EndpointAddress> {
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+ for index in ep_addr
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+ .map(|a| a.index()..a.index() + 1)
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+ .unwrap_or(1..NUM_ENDPOINTS)
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+ {
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+ let ep = &mut self.endpoints[index];
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+
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+ match ep.ep_type() {
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+ None => {
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+ ep.set_ep_type(ep_type);
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+ }
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+ Some(t) if t != ep_type => {
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+ continue;
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+ }
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+ _ => {}
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+ };
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+
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+ match ep_dir {
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+ UsbDirection::Out if !ep.is_out_buf_set() => {
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+ let (out_size, size_bits) = calculate_count_rx(max_packet_size as usize)?;
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+
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+ let buffer = self.ep_allocator.allocate_buffer(out_size)?;
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+
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+ ep.set_out_buf(buffer, size_bits);
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+
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+ return Ok(EndpointAddress::from_parts(index, ep_dir));
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+ }
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+ UsbDirection::In if !ep.is_in_buf_set() => {
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+ let size = (max_packet_size as usize + 1) & !0x01;
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+
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+ let buffer = self.ep_allocator.allocate_buffer(size)?;
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+
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+ ep.set_in_buf(buffer);
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+
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+ return Ok(EndpointAddress::from_parts(index, ep_dir));
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+ }
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+ _ => {}
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+ }
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+ }
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+
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+ Err(match ep_addr {
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+ Some(_) => UsbError::InvalidEndpoint,
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+ None => UsbError::EndpointOverflow,
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+ })
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+ }
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+
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+ fn enable(&mut self) {
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+ /*let mut max = 0;
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+ for (index, ep) in self.endpoints.iter().enumerate() {
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+ if ep.is_out_buf_set() || ep.is_in_buf_set() {
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+ max = index;
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+ }
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+ }
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+
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+ self.max_endpoint = max;*/
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+
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+ interrupt::free(|cs| {
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+ let regs = self.regs.borrow(cs);
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+
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+ // Reset the USB module.
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+ regs.usbtrc0.modify(|_, w| w.usbreset().set_bit());
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+ // TODO: Wait two USB clock cycles for reset.
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+
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+ // Set the BDT base registers.
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+ let bdt_address = &self.buffers.bdt as *const _ as u32;
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+ regs.bdtpage1
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+ .modify(|_, w| w.bdtba().bits((bdt_address >> 8) as u8));
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+ regs.bdtpage2
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+ .modify(|_, w| w.bdtba().bits((bdt_address >> 16) as u8));
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+ regs.bdtpage3
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+ .modify(|_, w| w.bdtba().bits((bdt_address >> 24) as u8));
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+
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+ // Clear all interrupt flags.
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+ regs.istat.write(|w| unsafe { w.bits(0xff) });
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+ regs.otgistat.write(|w| unsafe { w.bits(0xff) });
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+ // Clear all errors.
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+ regs.errstat.write(|w| unsafe { w.bits(0xff) });
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+ // Undocumented interrupt bit?
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+ regs.usbtrc0.write(|w| unsafe { w.bits(0x40) });
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+
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+ // Enable USB.
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+ regs.ctl.write(|w| w.usbensofen().set_bit());
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+ // Disable suspend, enable weak pull down.
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+ regs.usbctrl.write(|w| w.pde().set_bit());
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+ // Enable USB reset interrupt.
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+ regs.inten.modify(|_, w| w.usbrsten().set_bit());
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+ });
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+ }
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+
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+ fn reset(&self) {
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+ interrupt::free(|cs| {
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+ let regs = self.regs.borrow(cs);
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+
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+ regs.ctl.modify(|_, w| w.oddrst().set_bit());
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+
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+ // Initialize all buffer descriptors and endpoints.
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+ for ep in self.endpoints.iter() {
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+ ep.configure(cs);
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+ }
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+
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+ // Clear all interrupts.
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+ regs.istat.write(|w| unsafe { w.bits(0xff) });
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+ regs.errstat.write(|w| unsafe { w.bits(0xff) });
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+
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+ // After reset, the address is 0.
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+ regs.addr.modify(|_, w| w.addr().bits(0));
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+ // Enable all relevant interrupts.
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+ regs.erren.modify(|_, w| unsafe { w.bits(0xff) });
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+ regs.inten.modify(|_, w| {
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+ w.usbrsten()
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+ .set_bit()
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+ .erroren()
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+ .set_bit()
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+ .softoken()
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+ .set_bit()
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+ .tokdneen()
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+ .set_bit()
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+ .sleepen()
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+ .set_bit()
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+ .stallen()
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+ .set_bit()
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+ });
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+ });
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+ }
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+
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+ fn set_device_address(&self, addr: u8) {
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+ interrupt::free(|cs| {
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+ self.regs
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+ .borrow(cs)
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+ .addr
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+ .modify(|_, w| w.addr().bits(addr as u8));
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+ });
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+ }
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+
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+ fn poll(&self) -> PollResult {
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+ interrupt::free(|cs| {
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+ let regs = self.regs.borrow(cs);
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+
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+ let istat = regs.istat.read();
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+
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+ if istr.wkup().bit_is_set() {
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+ // Interrupt flag bits are write-0-to-clear, other bits should be written as 1 to avoid
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+ // race conditions
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+ regs.istr
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+ .write(|w| unsafe { w.bits(0xffff) }.wkup().clear_bit());
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+
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+ // Required by datasheet
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+ regs.cntr.modify(|_, w| w.fsusp().clear_bit());
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+
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+ PollResult::Resume
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+ } else if istr.reset().bit_is_set() {
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+ regs.istr
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+ .write(|w| unsafe { w.bits(0xffff) }.reset().clear_bit());
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+
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+ PollResult::Reset
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+ } else if istr.susp().bit_is_set() {
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+ regs.istr
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+ .write(|w| unsafe { w.bits(0xffff) }.susp().clear_bit());
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+
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+ PollResult::Suspend
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+ } else if istr.ctr().bit_is_set() {
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+ let mut ep_out = 0;
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+ let mut ep_in_complete = 0;
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+ let mut ep_setup = 0;
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+ let mut bit = 1;
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+
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+ for ep in &self.endpoints[0..=self.max_endpoint] {
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+ let v = ep.read_reg();
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+
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296
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+ if v.ctr_rx().bit_is_set() {
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+ ep_out |= bit;
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+
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+ if v.setup().bit_is_set() {
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+ ep_setup |= bit;
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+ }
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+ }
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+
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304
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+ if v.ctr_tx().bit_is_set() {
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+ ep_in_complete |= bit;
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+
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307
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+ interrupt::free(|cs| {
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308
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+ ep.clear_ctr_tx(cs);
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+ });
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+ }
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+
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312
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+ bit <<= 1;
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313
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+ }
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314
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+
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+ PollResult::Data {
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316
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+ ep_out,
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317
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+ ep_in_complete,
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318
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+ ep_setup,
|
|
|
319
|
+ }
|
|
|
320
|
+ } else {
|
|
|
321
|
+ PollResult::None
|
|
|
322
|
+ }
|
|
|
323
|
+ })
|
|
|
324
|
+ }
|
|
|
325
|
+
|
|
|
326
|
+ fn write(&self, ep_addr: EndpointAddress, buf: &[u8]) -> Result<usize> {
|
|
|
327
|
+ if !ep_addr.is_in() {
|
|
|
328
|
+ return Err(UsbError::InvalidEndpoint);
|
|
|
329
|
+ }
|
|
|
330
|
+
|
|
|
331
|
+ self.endpoints[ep_addr.index()].write(buf)
|
|
|
332
|
+ }
|
|
|
333
|
+
|
|
|
334
|
+ fn read(&self, ep_addr: EndpointAddress, buf: &mut [u8]) -> Result<usize> {
|
|
|
335
|
+ if !ep_addr.is_out() {
|
|
|
336
|
+ return Err(UsbError::InvalidEndpoint);
|
|
|
337
|
+ }
|
|
|
338
|
+
|
|
|
339
|
+ self.endpoints[ep_addr.index()].read(buf)
|
|
|
340
|
+ }
|
|
|
341
|
+
|
|
|
342
|
+ fn set_stalled(&self, ep_addr: EndpointAddress, stalled: bool) {
|
|
|
343
|
+ interrupt::free(|cs| {
|
|
|
344
|
+ if self.is_stalled(ep_addr) == stalled {
|
|
|
345
|
+ return;
|
|
|
346
|
+ }
|
|
|
347
|
+
|
|
|
348
|
+ let ep = &self.endpoints[ep_addr.index()];
|
|
|
349
|
+
|
|
|
350
|
+ match (stalled, ep_addr.direction()) {
|
|
|
351
|
+ (true, UsbDirection::In) => ep.set_stat_tx(cs, EndpointStatus::Stall),
|
|
|
352
|
+ (true, UsbDirection::Out) => ep.set_stat_rx(cs, EndpointStatus::Stall),
|
|
|
353
|
+ (false, UsbDirection::In) => ep.set_stat_tx(cs, EndpointStatus::Nak),
|
|
|
354
|
+ (false, UsbDirection::Out) => ep.set_stat_rx(cs, EndpointStatus::Valid),
|
|
|
355
|
+ };
|
|
|
356
|
+ });
|
|
|
357
|
+ }
|
|
|
358
|
+
|
|
|
359
|
+ fn is_stalled(&self, ep_addr: EndpointAddress) -> bool {
|
|
|
360
|
+ let ep = &self.endpoints[ep_addr.index()];
|
|
|
361
|
+ let reg_v = ep.read_reg();
|
|
|
362
|
+
|
|
|
363
|
+ let status = match ep_addr.direction() {
|
|
|
364
|
+ UsbDirection::In => reg_v.stat_tx().bits(),
|
|
|
365
|
+ UsbDirection::Out => reg_v.stat_rx().bits(),
|
|
|
366
|
+ };
|
|
|
367
|
+
|
|
|
368
|
+ status == (EndpointStatus::Stall as u8)
|
|
|
369
|
+ }
|
|
|
370
|
+
|
|
|
371
|
+ fn suspend(&self) {
|
|
|
372
|
+ interrupt::free(|cs| {
|
|
|
373
|
+ self.regs
|
|
|
374
|
+ .borrow(cs)
|
|
|
375
|
+ .cntr
|
|
|
376
|
+ .modify(|_, w| w.fsusp().set_bit().lpmode().set_bit());
|
|
|
377
|
+ });
|
|
|
378
|
+ }
|
|
|
379
|
+
|
|
|
380
|
+ fn resume(&self) {
|
|
|
381
|
+ interrupt::free(|cs| {
|
|
|
382
|
+ self.regs
|
|
|
383
|
+ .borrow(cs)
|
|
|
384
|
+ .cntr
|
|
|
385
|
+ .modify(|_, w| w.fsusp().clear_bit().lpmode().clear_bit());
|
|
|
386
|
+ });
|
|
|
387
|
+ }
|
|
|
388
|
+}
|