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Finish front panel.

Only LED resistors are still to be specified, in conjunction with the
resistors on the main board for matching brightness.
Mathias Gottschlag hace 5 años
padre
commit
745480728b

+ 29
- 0
frontpanel/FrontPanel-Footprints.pretty/PanelCutout_LED_0603_1608Metric_SideView_Inolux.kicad_mod Ver fichero

@@ -0,0 +1,29 @@
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+(footprint "PanelCutout_LED_0603_1608Metric_SideView_Inolux" (version 20201116) (generator pcbnew) (layer "F.Cu")
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+  (tedit 5FC9F963)
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+  (fp_text reference "REF**" (at 0 -0.5 unlocked) (layer "F.SilkS") hide
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+    (effects (font (size 1 1) (thickness 0.15)))
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+    (tstamp 48de3760-f742-4637-90ec-3ad872c57f18)
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+  )
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+  (fp_text value "PanelCutout_LED_0603_1608Metric_SideView_Inolux" (at 0 1 unlocked) (layer "F.Fab") hide
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+    (effects (font (size 1 1) (thickness 0.15)))
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+    (tstamp 4ee8696e-d3bd-445e-a302-0681ff22d30f)
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+  )
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+  (fp_text user "${REFERENCE}" (at 0 1.4 unlocked) (layer "F.Fab")
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+    (effects (font (size 1 1) (thickness 0.15)))
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+    (tstamp 6ddbea47-b25e-42ea-a8df-f4e8f38a9417)
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+  )
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+  (fp_line (start 0.85 0.3) (end 0.75 0.3) (layer "F.SilkS") (width 0.12) (tstamp 14de2fd0-733a-417f-acf3-519ae8835746))
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+  (fp_line (start 0.85 -0.3) (end 0.75 -0.3) (layer "F.SilkS") (width 0.12) (tstamp 6dd4f922-cec7-4595-9e22-05a3911132bf))
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+  (fp_line (start -0.85 0.3) (end -0.85 -0.3) (layer "F.SilkS") (width 0.12) (tstamp 9734e07c-f82d-48a0-92c5-08b74ba7aa6c))
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+  (fp_line (start -0.85 0.3) (end -0.75 0.3) (layer "F.SilkS") (width 0.12) (tstamp c17277fa-a33c-40a1-be8a-4503a8267828))
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+  (pad "" np_thru_hole circle (at 0 0) (size 1.3 1.3) (drill 1.3) (layers *.Mask) (tstamp a7dec3f3-863c-47a1-b4f9-001f58955994))
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+  (model "${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl"
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+    (offset (xyz 0 0 1))
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+    (scale (xyz 1 1 1))
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+    (rotate (xyz -180 0 0))
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+  )
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+)

+ 44
- 0
frontpanel/FrontPanel-Footprints.pretty/Vishay_Mold_Reverse.kicad_mod Ver fichero

@@ -0,0 +1,44 @@
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+(footprint "Vishay_Mold_Reverse" (version 20201116) (generator pcbnew) (layer "F.Cu")
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+  (tedit 5FCA856C)
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+  (fp_text reference "REF**" (at 0 -3.45 unlocked) (layer "F.SilkS")
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+    (effects (font (size 1 1) (thickness 0.15)))
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+    (tstamp b0c3dde6-e5de-40b5-bd55-9923d48684e1)
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+  )
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+  (fp_text value "Vishay_Mold_Reverse" (at 0 -4.85 unlocked) (layer "F.Fab")
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+    (effects (font (size 1 1) (thickness 0.15)))
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+    (tstamp 916b72d5-34ae-47f5-8320-29bc54681393)
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+  )
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+  (fp_text user "${REFERENCE}" (at 0 -3.45 unlocked) (layer "F.Fab")
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+    (effects (font (size 1 1) (thickness 0.15)))
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+    (tstamp 898b9b20-e0ff-477a-9f49-266a906b0ab1)
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+  )
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+  (fp_rect (start -3 -2.65) (end 3 4.3) (layer "F.SilkS") (width 0.12) (fill none) (tstamp ac530a3a-4b68-4f14-8261-ee669508f329))
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+  (fp_rect (start -3.5 -3.15) (end 3.5 8.85) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp 949a8cba-39ca-4ed9-a09b-6bd987f8e284))
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+  (fp_line (start -2.2 5.6) (end -1.5 5.6) (layer "F.Fab") (width 0.1) (tstamp 0a4a2a7e-a281-4c12-b023-ed5d2bcb7c42))
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+  (fp_line (start -2.2 8.6) (end -2.2 5.6) (layer "F.Fab") (width 0.1) (tstamp 2bd1adc4-d6ec-409a-b64f-bd0e7cdd1f2e))
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+  (fp_line (start 0.35 8.6) (end 0.35 4.3) (layer "F.Fab") (width 0.1) (tstamp 3451da1c-535a-4b4d-8530-061d9fe3121a))
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+  (fp_rect (start -3 -2.65) (end 3 4.3) (layer "F.Fab") (width 0.1) (fill none) (tstamp 74989f13-124f-4cc3-9287-e0db4644650a))
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+  (pad "" np_thru_hole circle (at 0 0) (size 4 4) (drill 4) (layers *.Mask) (tstamp 92c07786-1d35-47a5-8e77-07c2e6aff18a))
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+  (pad "1" smd rect (at 2.54 7.1) (size 1 3) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 4ab83ee1-4b70-4bf5-89b0-6e1f508881c7))
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+  (pad "2" smd rect (at 0 7.1) (size 1 3) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp a83f636c-19ff-4469-941c-3cdfc97663a7))
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+  (pad "3" smd rect (at -2.54 7.1) (size 1 3) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 3bf202f9-4250-433a-a20e-67d219a9bc93))
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+  (model "${KISYS3DMOD}/OptoDevice.3dshapes/Vishay_MOLD-3Pin.wrl"
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+    (offset (xyz 2.54 -7.62 3.05))
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+    (scale (xyz 1 1 1))
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+    (rotate (xyz 90 180 0))
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+  )
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+)

+ 9620
- 9450
frontpanel/frontpanel.kicad_pcb
La diferencia del archivo ha sido suprimido porque es demasiado grande
Ver fichero


+ 1
- 1
frontpanel/frontpanel.kicad_prl Ver fichero

@@ -1,6 +1,6 @@
1 1
 {
2 2
   "board": {
3
-    "active_layer": 31,
3
+    "active_layer": 0,
4 4
     "active_layer_preset": "All Layers",
5 5
     "hidden_nets": [],
6 6
     "high_contrast_mode": 0,

+ 20
- 5
frontpanel/frontpanel.kicad_pro Ver fichero

@@ -48,7 +48,13 @@
48 48
           "min_clearance": 0.508
49 49
         }
50 50
       },
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-      "diff_pair_dimensions": [],
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+      "diff_pair_dimensions": [
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+        {
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+          "gap": 0.0,
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+          "via_gap": 0.0,
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+          "width": 0.0
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+        }
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+      ],
52 58
       "drc_exclusions": [],
53 59
       "meta": {
54 60
         "version": 1
@@ -110,10 +116,19 @@
110 116
         "solder_mask_clearance": 0.0,
111 117
         "solder_mask_min_width": 0.0,
112 118
         "solder_paste_clearance": 0.0,
113
-        "solder_paste_margin_ratio": 0.0
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+        "solder_paste_margin_ratio": -0.0
114 120
       },
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-      "track_widths": [],
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-      "via_dimensions": [],
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+      "track_widths": [
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+        0.0,
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+        0.25,
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+        0.5
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+      ],
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+      "via_dimensions": [
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+        {
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+          "diameter": 0.0,
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+          "drill": 0.0
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+        }
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+      ],
117 132
       "zones_allow_external_fillets": false,
118 133
       "zones_use_no_outline": true
119 134
     },
@@ -373,7 +388,7 @@
373 388
   },
374 389
   "sheets": [
375 390
     [
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-      "e232af48-e819-469e-84e0-eb79869ea548",
391
+      "266ddc5b-8ad8-474f-b94b-70c7d67e0520",
377 392
       ""
378 393
     ]
379 394
   ],

+ 828
- 1587
frontpanel/frontpanel.kicad_sch
La diferencia del archivo ha sido suprimido porque es demasiado grande
Ver fichero


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