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nrf24l01_definitions.h 4.0KB

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  1. #ifndef NRF24L01_DEFINITIONS_H
  2. #define NRF24L01_DEFINITIONS_H
  3. #define MAX_ADDRESS_LENGTH 5
  4. /* NRF24L01 register mnemonic definitions */
  5. #define CONFIG_ADDRESS 0x0
  6. #define EN_AA_ADDRESS 0x1
  7. #define EN_RXADDR_ADDRESS 0x2
  8. #define SETUP_AW_ADDRESS 0x3
  9. #define SETUP_RETR_ADDRESS 0x4
  10. #define RF_CH_ADDRESS 0x5
  11. #define RF_SETUP_ADDRESS 0x6
  12. #define STATUS_ADDRESS 0x7
  13. #define OBSERVE_TX_ADDRESS 0x8
  14. #define CD_ADDRESS 0x9
  15. #define RX_ADDR_P0_ADDRESS 0xA
  16. #define RX_ADDR_P1_ADDRESS 0xB
  17. #define RX_ADDR_P2_ADDRESS 0xC
  18. #define RX_ADDR_P3_ADDRESS 0xD
  19. #define RX_ADDR_P4_ADDRESS 0xE
  20. #define RX_ADDR_P5_ADDRESS 0xF
  21. #define TX_ADDR_ADDRESS 0x10
  22. #define RX_PW_P0_ADDRESS 0x11
  23. #define RX_PW_P1_ADDRESS 0x12
  24. #define RX_PW_P2_ADDRESS 0x13
  25. #define RX_PW_P3_ADDRESS 0x14
  26. #define RX_PW_P4_ADDRESS 0x15
  27. #define RX_PW_P5_ADDRESS 0x16
  28. #define FIFO_STATUS_ADDRESS 0x17
  29. #define DYNPD_ADDRESS 0x1C
  30. #define FEATURE_ADDRESS 0x1D
  31. /* Register bits definitions */
  32. /* CONFIG*/
  33. typedef union
  34. {
  35. uint8_t byte;
  36. struct
  37. {
  38. uint8_t PRIM_RX : 1;
  39. uint8_t PWR_UP : 1;
  40. uint8_t CRCO : 1;
  41. uint8_t EN_CRC : 1;
  42. uint8_t MASK_MAX_RT : 1;
  43. uint8_t MASK_TX_DS : 1;
  44. uint8_t MASK_RX_DR : 1;
  45. uint8_t RESERVED : 1;
  46. }bits;
  47. }CONFIG_REGISTER;
  48. /*EN_AA */
  49. typedef union
  50. {
  51. uint8_t byte;
  52. struct
  53. {
  54. uint8_t ENAA_P0 : 1;
  55. uint8_t ENAA_P1 : 1;
  56. uint8_t ENAA_P2 : 1;
  57. uint8_t ENAA_P3 : 1;
  58. uint8_t ENAA_P4 : 1;
  59. uint8_t ENAA_P5 : 1;
  60. uint8_t RESERVED : 2;
  61. }bits;
  62. }EN_AA_REGISTER;
  63. /* EN_RXADDR */
  64. typedef union
  65. {
  66. uint8_t byte;
  67. struct
  68. {
  69. uint8_t ERX_P0 : 1;
  70. uint8_t ERX_P1 : 1;
  71. uint8_t ERX_P2 : 1;
  72. uint8_t ERX_P3 : 1;
  73. uint8_t ERX_P4 : 1;
  74. uint8_t ERX_P5 : 1;
  75. uint8_t RESERVED : 2;
  76. }bits;
  77. }EN_RXADDR_REGISTER;
  78. /* SETUP_AW */
  79. typedef union
  80. {
  81. uint8_t byte;
  82. struct
  83. {
  84. uint8_t AW : 2;
  85. uint8_t RESERVED : 6;
  86. }bits;
  87. }SETUP_AW_REGISTER;
  88. #define ADDRESS_WIDTH_3_BYTES 0x1
  89. #define ADDRESS_WIDTH_4_BYTES 0x2
  90. #define ADDRESS_WIDTH_5_BYTES 0x3
  91. /* SETUP_RETR */
  92. typedef union
  93. {
  94. uint8_t byte;
  95. struct
  96. {
  97. uint8_t ARC : 4;
  98. uint8_t ARD : 4;
  99. }bits;
  100. }SETUP_RETR_REGISTER;
  101. /* RF_CH */
  102. typedef union
  103. {
  104. uint8_t byte;
  105. struct
  106. {
  107. uint8_t RF_CH : 7;
  108. uint8_t RESERVED : 1;
  109. }bits;
  110. }RF_CH_REGISTER;
  111. /* RF_SETUP */
  112. typedef union
  113. {
  114. uint8_t byte;
  115. struct
  116. {
  117. uint8_t LNA_HCURR : 1;
  118. uint8_t RF_PWR : 2;
  119. uint8_t RF_DR : 1;
  120. uint8_t PLL_LOCK : 1;
  121. uint8_t RESERVED : 3;
  122. }bits;
  123. }RF_SETUP_REGISTER;
  124. #define RF_DATA_RATE_1MBPS 0x0
  125. #define RF_DATA_RATE_2MBPS 0x1
  126. #define RF_OUTPUT_POWER_MINUS_18DBM
  127. #define RF_OUTPUT_POWER_MINUS_12DBM
  128. #define RF_OUTPUT_POWER_MINUS_16DBM
  129. #define RF_OUTPUT_POWER_0DBM
  130. // TODO: change order of all bit fields!!!
  131. /* STATUS */
  132. typedef union
  133. {
  134. uint8_t byte;
  135. struct
  136. {
  137. uint8_t TX_FULL : 1;
  138. uint8_t RX_P_NO : 3;
  139. uint8_t MAX_RT : 1;
  140. uint8_t TX_DS : 1;
  141. uint8_t RX_DR : 1;
  142. uint8_t RESERVED : 1;
  143. }bits;
  144. }STATUS_REGISTER;
  145. #define RX_FIFO_EMPTY 0x7
  146. /* OBSERVE_TX */
  147. typedef union
  148. {
  149. uint8_t byte;
  150. struct
  151. {
  152. uint8_t ARC_CNT : 4;
  153. uint8_t PLOS_CNT : 4;
  154. }bits;
  155. }OBSERVE_TX_REGISTER;
  156. /* CD */
  157. typedef union
  158. {
  159. uint8_t byte;
  160. struct
  161. {
  162. uint8_t CD : 1;
  163. uint8_t RESERVED : 7;
  164. }bits;
  165. }CD_REGISTER;
  166. /* RX_PW_Pn */
  167. typedef union
  168. {
  169. uint8_t byte;
  170. struct
  171. {
  172. uint8_t RESERVED : 2;
  173. uint8_t RX_PW_Pn : 6;
  174. }bits;
  175. }RX_PW_Pn_REGISTER;
  176. /* FIFO_STATUS */
  177. typedef union
  178. {
  179. uint8_t byte;
  180. struct
  181. {
  182. uint8_t RX_EMPTY : 1;
  183. uint8_t RX_FULL : 1;
  184. uint8_t RESERVED1 : 2;
  185. uint8_t TX_EMPTY : 1;
  186. uint8_t TX_FULL : 1;
  187. uint8_t TX_REUSE : 1;
  188. uint8_t RESERVED0 : 1;
  189. }bits;
  190. }FIFO_STATUS_REGISTER;
  191. /* DYNPD */
  192. typedef union
  193. {
  194. uint8_t byte;
  195. struct
  196. {
  197. uint8_t DPL_P0 : 1;
  198. uint8_t DPL_P1 : 1;
  199. uint8_t DPL_P2 : 1;
  200. uint8_t DPL_P3 : 1;
  201. uint8_t DPL_P4 : 1;
  202. uint8_t DPL_P5 : 1;
  203. uint8_t RESERVED : 2;
  204. }bits;
  205. }DYNPD_REGISTER;
  206. /* FEATURE */
  207. typedef union
  208. {
  209. uint8_t byte;
  210. struct
  211. {
  212. uint8_t EN_DYN_ACK : 1;
  213. uint8_t EN_ACK_PAY : 1;
  214. uint8_t EN_DPL : 1;
  215. uint8_t RESERVED : 5;
  216. }bits;
  217. }FEATURE_REGISTER;
  218. #endif